Search for: All records

This paper demonstrates a high-efficiency modular multilevel resonant DC-DC converter (MMRC) with zero-voltage switching (ZVS) capability. In order to minimize the conduction loss in the converter, optimizing the root-mean-square (RMS) current flowing through switching devices is considered an effective approach. The analysis of circuit configuration and operating principle show that the RMS value of the current flowing through switching devices is closely related to the factors such as the resonant tank parameters, switching frequency, converter output voltage and current, etc. A quantitative analysis that considers all these factors has been performed to evaluate the RMS current of all the components in the circuit. When the circuit parameters are carefully designed, the switch current waveform can be close to the square waveform, which has a low RMS value and results in low conduction loss. And a design example based on the theoretical analysis is presented to show the design procedures of the presented converter. A 600 W 48 V-to-12 V prototype is built with the parameters obtained from the design example section. Simulation and experiments have been performed to verify the high-efficiency feature of the designed converter. The measured converter peak efficiency reaches 99.55% when it operates at 200 kHz. And its power density can be as high as 795 W/in 3 . 

In this paper, a new method helps compare and analysis different topology is proposed. Also, a new method that can analyze and derive the minimum device power loss for the resonant switched capacitor topology is developed. By applying total semiconductor power loss index (TSLI), the optimum total die size needed for the specific topology with fixed power level and switching frequency can be calculated. Thus, the minimum device power loss can be reached at same time. Besides, TSLI can also help to determine which topology has a lower semiconductor device power loss when operating under same condition. 

A 300 V to 600 V 100 kW SiC MOSFET based one-cell switched tank converter (STC) is developed as a bidirectional dc-dc power transfer stage between the vehicle battery and the DC-link side of the vehicle dc-ac inverter. A continuous half-load 50 kW and short-period full-load 100 kW operation is targeted. Working principles of the proposed topology are analyzed. Design of the key components such as SiC MOSFET power modules, AC resonant capacitor and inductor is presented. A 100 kW prototype has been assembled and tested. An energy-efficient test platform is designed. The power density of the main power processing part is around 41.7 kW/L. The tested peak and full-load efficiencies are about 98.7% and 97.35%, respectively. The thermal performance has also been evaluated. Both the tested electrical and thermal results are consistent with the theoretical design. 

This paper compares three different dc-dc topologies, i.e. boost converter, three-level flying capacitor multilevel converter (FCMC) and one-cell switching tank converter (STC) for a 100 kW electric vehicle power electronic system. This bidirectional dc-dc converter targets 300 V - 600 V voltage conversion. Total semiconductor loss index (TSLI) has been proposed to evaluate topologies and device technologies. The boost converter and one-cell STC have been fairly compared by utilizing this index. The simulation results of a 100 kW one-cell STC working at zero current switching (ZCS) mode have been provided. A 100 kW hardware prototype using 1200 V 600 A SiC power module has been built. The estimated efficiency is about 99.2% at 30 kW, 99.13% at half load, and 98.64% at full load. The power density of the main circuits is about 42 kW/L 

This paper presents a 100kW one-cell switched-tank converter (STC) for electric vehicle (EV) application. A new evaluation method that evaluates different converter topologies has been proposed in this paper to show the advantages of the STC over the boost converter and 3-level flying capacitor multilevel (FCML) converter. Both non-interleaved (1-phase) and interleaved (2-phase and 3-phase) operation of the STC have been analyzed. The analytical study shows that it is difficult to achieve the optimum design of the passive components such as input and output capacitors in 1-phase converter because of the high RMS current flowing through them. This means the passive components need to be over-designed in order to meet the current stress requirement. For instance, the designed capacitance of input capacitor is several times of the required value, which leads to bulky capacitor size. Therefore, this paper evaluates the potentials of using 2-phase and 3-phase interleaved operation to address this issue. Two operation modes, zero-voltage switching (ZVS) mode and zero-current switching (ZCS) mode, are evaluated to show the ZCS operation mode is more suitable for the presented converter with interleaved operation. By using the interleaving concept, the predicted 100kW 3-phase interleaved converter can achieve 60% size reduction based on the 1-phase converter design. And the predicted power density of the 3-phase interleaved STC can achieve 115kW/L power density. Simulation results are provided to validate the theoretical analysis. Both 1-phase and 3-phase 100kW prototypes under developing are shown in this paper. 

Multilevel modular resonant switched-capacitor converter can achieve either zero-current switching (ZCS) or zero-voltage switching (ZVS) by utilizing different converter control strategies. This paper presents a comprehensive way to compare the root mean square (RMS) value of current flowing through switching devices in both ZCS operation and ZVS operation. The study shows that with appropriate converter parameter design, the ZVS operation allows the RMS value of switch current at most 10% lower than that in ZCS operation. Therefore, the converter operating at ZVS mode has the potential to achieve higher efficiency comparing to the converter that operates at ZCS mode due to less semiconductor conduction loss. Furthermore, the ZVS operation can reduce the power loss due to MOSFET output capacitance. A 6x converter with 54V input voltage, 9V output voltage and 600W power rating is used as an example to show the detailed design procedure. Simulation results are provided to verify the theoretical analysis. Also, a 600W lab prototype that has 6 to 1 voltage conversion ratio has been built to verify the theoretical analysis.